Publikācijas 2009 “Simulation and computation of the asymmetry of a clocked balanced tunnel-diode comparator”

E. Beiners, K.Kruminsh. “Simulation and computation of the asymmetry of a clocked balanced tunnel-diode comparator”, “Automatic Control and Computer Sciences”, Allerton Press, Inc., 2009, Vol.43, Issue 2, pp. 109-112.

By means of simulation and computation, a clocked balanced tunnel-diode comparator, in which the clock signal conditioner is also a tunnel diode, is studied. Simulation and computation of the tunnel-diode asymmetry required for obtaining a minimum offset of the zero level of the compensation voltage are carried out. Simulation of the clocked balanced comparator is performed by means of the Tanner T-Spice program.