Revitalizing European Semiconductor Industry Through Data-enhanced Manufacturing (TREASURY)

Project aims and objectives

TREASURY responds to Europe’s need to strengthen semiconductor manufacturing amid growing global competition. The project aims to make the European semiconductor ecosystem more efficient, resilient and competitive by using artificial intelligence (AI), digital twins and data analytics, without requiring major new investment in fabs or replacement of existing equipment. It brings together fabs, equipment manufacturers and research institutes to improve process quality, production capacity and cost competitiveness, while addressing workforce shortages and strengthening supply chain resilience.

The project’s main objective is to develop a reference framework for connecting and using equipment and process data for process control, digital twins and AI analytics. TREASURY will create reusable technical solutions based on generative and agentic AI, digital twins, hybrid models and AI-based human augmentation. The solutions will be demonstrated in six use cases through 14 demonstrators at fabs and equipment manufacturers.

IECS tasks in the project

IECS will develop a generative AI pipeline that synthesises realistic wafer microscopy images with rare industrial anomalies and automatically generates their annotations (defect masks). This will help improve the accuracy of defect recognition models where real data is very scarce. To this end, IECS will adapt and optimise open-source diffusion and GAN models. Generation will be controllable by defect type, size and location, while style transfer (Sim2Real) methods will reduce the gap between synthetic and real images. Initial samples of real anomalies will be provided by project partner ams-OSRAM. The generated data (more than 2,000 new images) will be validated by training classification and detection models on synthetic data and evaluating their accuracy on real data. The goal is to improve accuracy by 5–15% and raise the solution’s technology readiness level (TRL) from 4 to 6.

IECS also leads the project’s dissemination task (T6.2). Within this task, IECS will develop, implement and continuously refine the dissemination plan throughout the project, defining target audiences, key messages, channels and key performance indicators. Results will reach scientific, industrial and end-user audiences through scientific publications, international conferences, exhibitions, webinars, partner communication channels and the network of Chips Competence Centres, while ensuring the protection of knowledge and intellectual property. This will increase the visibility of project results and support knowledge transfer and their uptake across the European semiconductor ecosystem.

TREASURY is supported by the Chips Joint Undertaking and its members, including top-up funding by national authorities, under grant agreement No 101252456.

Funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or the granting authority. Neither the European Union nor the granting authority can be held responsible for them.