Latvian Patent No. 14803. “Clocked comparator with delay line”. Inventors: K.Krūmiņš, E.Beiners un V.Pētersons. Owner: Institute of Electronics and Computer Science: . Published: 20.01.2014.

This invention relates to measuring technique, and it can be used for comparison of instantaneous values of electrical signal with a threshold, as well as for signal equivalent time conversion. The comparator consists of two series-connected tunnel diodes and a third tunnel diode that serves as clock signal shaper. The goal of the invention is to improve the time resolution of the clocked comparator. The time resolution of the clocked comparator is characterized by a rise time of transient characteristic of the equivalent time converter built on this comparator. In order to achieve the proposed goal, between tunnel diodes a delay line is included in the circuitry.